A long standing problem in the semiconductor industry has been the inability to put analog and digital devices on the same chip. Many products ranging from cell phones to hard disk drives have both analog and digital components. Typically the analog components interface with the “real world” and the digital components do the internal logic. For example, on a cell phone the analog components include radio receivers and transmitters, and the digital components support the many features of the cell phone like call waiting, re-dialing, etc. Likewise on a hard disk drive, the interface with the magnetic read-head is analog, and the data transfer to the host computer is digital.
The pressures of competition tend to force companies toward “smaller, faster, cheaper.” In semiconductor terms this translates to smaller chip count, where the “holy grail” is the single chip product. If the products have both analog and digital components, this would mean a single chip with both analog and digital devices on the same shared semiconductor substrate.
Heretofore, mixed analog-digital devices have been impractical. This is because digital devices generate large amounts of electronic noise, and analog devices typically do not function properly in the face of even small quantities of electronic noise. Digital devices generate noise “spikes” every time they switch from zero to one, or from one to zero. Needless to say, this switching takes place quite frequently, as in millions of times per second typically. The digital devices themselves are quite robust against (their own) noise because “anything close to one” is interpreted as a one, and likewise for zero. With only two possibilities, zero and one, there is much “room for error.”
Analog devices, on the other hand, are quite sensitive to electronic noise. Instead of representing information as only 0s and 1s, analog devices represent information as a spectrum of gradations between, say 0 and 1. So, where 0.9 gets “rounded” to 1 in a digital device, in an analog device 0.9 and 1.0 are distinctly different values. Any electronic noise which would blur 0.9 with 1.0, or even 0.90 with 0.91 would degrade the functionality of the analog device.
If this mixed analog-digital problem could be solved, many products could be built smaller, cheaper, and brought to market more quickly. Even if the solution called for analog components which would take up more space or “semiconductor real estate”, this would be acceptable because typically the analog devices are a small part of the overall unit. The digital components dominate in space utilization. So, even a doubling or tripling of the analog “foot print” would be happily exchanged for the consolidation of the entire unit into a single chip.
In addition to the great need to build mixed analog-digital devices on a single chip, there is another equally important need to bring chips to market more quickly. These time-to-market pressures have already created a strong demand for field programmable gate arrays. FPGAs are an example of general way of designing chips which can be customized and targeted toward a wide range of specific functionalities. FPGAs are popular because chip production is, in effect, pushed from chip “hardware” design into “software” thus greatly speeding up the process.
FPGAs are an artifact of the digital world, and do not have a use in the mixed analog-digital design space. And yet, the same time-to-market pressures are present for hybrid analog-digital devices. If a general approach could be discovered to build these mixed analog-digital devices, many products could be brought to market much faster, and for a much lower cost.
As we will see in this patent application, this approach we have used makes possible mixed analog-digital chips, and a way to evolve these chips so a single semiconductor design can be re-targeted to a wide variety of functional uses.